Techniques for LI-BDN Synthesis for Hybrid Microarchitectural Simulation [abstract] (PDF)
Tyler S. Harris
Masters Thesis, Department of Electrical and Computer Engineering, Brigham Young University, May 2013.

Microarchitects use simulators to explore the microprocessor design space. As multiprocessor chips become more common, simulators will become both more essential and complex. The added complexity will require new simulation techniques in order to reduce to run time of the simulators to the point where they are use full for design space exploration.

Hybrid simulation is one technique for creating faster simulations, but it comes at the cost of vastly increased compiler complexity. CAD tools can be built automatically produce hybrid simulators, and hence neutralize the threat of compiler complexity. One troublesome area for hybrid simulators is the creation of associative data structures, such as re-order buffers and transition look aside buffers. The naive synthesis technique is to create a large matrix of flip flops and LUTs. It is a greater challenge to create a CAD tool that recognizes these structures and synthesizes them effeciently into hardware. This work presents a technique for accomplishing this task.